(a) Field of the Invention
The present invention relates to an insulated gate field effect transistor (referred to as an IGFET hereinafter) and a method for manufacturing the same, and more particularly, to an IGFET and a method for manufacturing the same in which a polycrystalline silicon layer serving as a gate electrode is formed of a P-type layer.
(b) Description of the Related Art
An IGFET has a variety of applications in many circuits including power circuits. A conventional method for manufacturing an IGFET will be first described with reference to the drawings. FIGS. 1(A) to 1(C) each shows a step in a conventional process for manufacturing an IGFET of a vertical structure as an example. A gate oxide film 3 and a polycrystalline silicon layer 4 serving as a gate electrode are consecutively formed on a P-type epitaxial layer 2 grown on a P-type silicon substrate 1, an opening 11 being formed in the the gate oxide film 3 and the polycrystalline silicon layer 4 by a photolithographic technology. An N-type base layer 5 is formed by doping a portion of the P-type epitaxial layer 2 with N-type impurities through the opening 11 (FIG. 1A).
Next, a resist layer not shown in the drawings is formed and selectively etched for exposing portions of the base layer 5. P-type source regions 6A are formed on the N-type base layer 5 as shown in FIG. 1B by ion-implanting using the resist layer as a mask. Then, an N-type (n+) contact region 8A for contacting the base layer 5 with an aluminium electrode to be deposited is formed between both the source regions 6A by an ion-implanting by use of a photo-resist layer 7A as a mask. After the photoresist layer 7A is removed, an interlayer insulation film 9 and an aluminium electrode 10 are consecutively formed as shown in FIG. 1C.
The IGFET as shown in FIGS. 1A to 1C has a drawback in which the threshold voltage of the IGFET is not controlled to a desired value, so that the the reliability of the IGFET in an operation is not sufficient.